Three Common Communication Protocols for Embedded Devices

Three Common Communication Protocols for Embedded Devices

Embedded devices need to set parameters during operation, and this task is often implemented by a PC. A communication protocol must be designed for both parties, with three representative protocols as follows: From the table above, it can be seen that the memory and computational performance of general embedded devices are limited, so fixed binary … Read more

Initial Configuration Sequence of STM32CubeMx and DMA Transfer Issues

Initial Configuration Sequence of STM32CubeMx and DMA Transfer Issues

Many STM32 developers often configure and generate initialization code based on the HAL library using STM32CubeMx. When it comes to DMA functionality, they find that it is ineffective, but cannot seem to identify the cause from the configuration operations and the code itself. This situation can often be quite frustrating. For example, someone reported that … Read more

Analysis of BYD Tang’s Product Strength: Is It Fragrant or Sweet?

Analysis of BYD Tang's Product Strength: Is It Fragrant or Sweet?

Produced by | Houlang Graphic Group Written by | Zhang Lijuan I’ve seen quite a few cars and have ridden in many, but only a few have I deeply observed, and the BYD Tang definitely ranks among them because the boss’s favorite car is the BYD Tang. The few owners I’ve interacted with are loyal … Read more

FPGA Development SATA Protocol Manual: DMA in the SATA Transport Layer (Part 8)

FPGA Development SATA Protocol Manual: DMA in the SATA Transport Layer (Part 8)

Introduction In the SATA protocol, the essence of data transmission is the interaction of FIS (Frame Information Structure). Different FIS types are responsible for different aspects: some are for “notification”, some for “context configuration”, and others for “actual data transfer”. If we consider SATA as a highway, then these FIS are like traffic lights, road … Read more

STM32 UART Variable Length Reception: A Comprehensive Guide

STM32 UART Variable Length Reception: A Comprehensive Guide

Click the blue text above to follow us Embedded Training – Choose Jufeng Smart Link Why Use UART Variable Length Reception Standard blocking reception functions HAL_UART_Receive(UART_HandleTypeDef * huart, uint8_t * pData, uint16_t Size,uint32_t Timeout) // huart: handle // pData: variable to hold received data // Size: size of data to be received Interrupt reception functions … Read more

Lecture Notes on Microcomputer Principles and Interface Technology for Embedded Systems

Lecture Notes on Microcomputer Principles and Interface Technology for Embedded Systems

The field of embedded systems encompasses a wide range of topics, and there are many choices regarding what and how to teach in the “Microcomputer Principles and Interface Technology” course. Here, I will introduce my approach. 1. Overview of the Main Knowledge Points First Level Knowledge Points (1) Von Neumann Architecture; (2) Embedded Hardware Systems; … Read more

What is Memory in Embedded Operating Systems?

What is Memory in Embedded Operating Systems?

Follow and star our public account to access exciting content Source: Online materials Key content: ☆ Linux memory organization structure and page layout, causes of memory fragmentation and optimization algorithms. ☆ Various memory management methods in the Linux kernel, memory usage scenarios, and pitfalls in memory usage. ☆ From the principles and structure of memory … Read more

02-Hrtime Triggering ADC Sampling

02-Hrtime Triggering ADC Sampling

In the previous chapter, we configured the Hrtime TA TB output complementary PWM output. In this section, we will configure the use of TA CH3 channel to trigger ADC sampling. The MCU used is GD32F334.1. ADC Configuration2.1 ADC1 Mode ConfigurationEnable ADC1 channels 1, 2, and 3.Clock Prescaler: The clock division, the main clock is divided … Read more

Solutions for ADC+DMA Target Array Not Updating

Solutions for ADC+DMA Target Array Not Updating

@[toc] Code Structure Optimization /* USER CODE BEGIN Header */ /** ****************************************************************************** * @file : adc_dma.c * @brief : ADC with DMA implementation for STM32F7 series ****************************************************************************** * @attention * – STM32F7 L1-cache considerations: * – Enabling D-cache will cause DMA data not to update * – Solutions: * – Use DTCM memory (0x20000000) * … Read more

SPI 32-Bit Wide DMA Transmission Failure Issue

SPI 32-Bit Wide DMA Transmission Failure Issue

Someone is usingthe STM32H563 development productand has enabledDMA mode forSPI communication. They discovered an issue where, when theSPI data width is configured to16 bits or32 bits, using theSTM32 HAL library’sSPI DMA API start function results in no data transmission. However, if theSPI data width is configured to8 bits, the transmission works normally. What could be … Read more