2016 Microcomputer and Applications Issue 3 Author: Yuan Qianqian Abstract: This article provides a detailed study of the computer boot process and system loading, combining the collaborative invocation mechanism between hardware and software. It presents a relatively complete discussion of the entire process from pressing the power button to loading the operating system, culminating in … Read more
◆ ◆ ◆ Editor | Xiao Qi The preparation materials for the 2019 National Computer Level 3 Embedded System Development Exam have been compiled by senior students for those preparing for the exam. The preparation materials include the latest exam syllabus, textbook review materials, learning videos, past exam questions and sample questions, and simulated question … Read more
1. Storage Unit Conversion 1 word = 2 half words = 4 bytes = 4*8 bits TB = 2^10GB GB = 2^10MB MB = 2^10KB KB = 1000Byte Byte = 8bit Storage Capacity V = 2^m * n (m is the number of address lines, n is the data line width) unit is bit. Example … Read more
1. Shift Operation Instructions LSL, LSR, ASR, ROR, RRX 2. Instruction Condition Code 3. Memory Access Instructions — LDR Word Data Load Instruction.<span>LDR</span><span> instruction is used to transfer a</span><span> 32</span><span>-bit word data from memory to the destination register. This instruction is usually used to read</span><span> 32</span><span>-bit word data into a general-purpose register for processing.</span> — … Read more
The giveaway event for the “Beginner’s Guide to Hardware Design Volume 1” continues to be a hot topic, and many friends have successfully received their copies. For those who have not yet claimed it, please go to the WeChat account: Super Engineer, click on the “View History Messages” option, then open the article titled “New … Read more
ARM processors are all RISC architecture, single-cycle operations, instruction pipelines, using load or store instructions to access memory. ARM7 adopts the von Neumann architecture, 3 stage pipeline; ARM9 adopts Harvard architecture, 5 stage pipeline; Cortex-A15 adopts 13 stage pipeline.ARM after reset PC unconditionally points to 0x00000000. MMU is the memory management unit of the ARM … Read more
Training Objectives To possess the ability to develop embedded systems and application software, test embedded products, and sell and maintain embedded products; to master the basic application abilities of embedded application technology, operating systems, programming, and networking; to be able to engage in the design and development of new embedded products, production and management, testing … Read more
For computer level examination exam points, send “computer”; for CET-4 and CET-6 real questions and vocabulary list, send “CET”. Computer Level Examination Date: March 27 to 29 (60th time) Below is the Computer Level 3 Embedded System Development Technology Examination Syllabus (2018 version) Why not the 2021 version? It indicates that there has been no … Read more
To not miss my updates, remember to check the official account in the upper right corner and set it as a star, take down the star and give it to me. In the 4th lecture of the 5th season of Back2School, the main content brought to everyone is the setup of the engineer’s working environment … Read more
Professors Ma Chunyuan and Zhang Tao from Northwestern Polytechnical University, along with masters Chen Jing and Yao Ding, recently published a paper titled “Evaluation Methods for Computing Power of Embedded Intelligent Computers” in the Journal of Computer Science. The abstract of the paper is as follows. Scan the QR code or click “Read the original … Read more